As semiconductor devices are increasing in layout density, technology scaling has led to development of fin-based, also referred to as FinFET structures as an alternative to bulk metal-oxide-semiconductor FET structures for improved scalability. The FinFET utilizes a semiconductor fin to wrap the conducting channel, and the fin forms the body of the transistor. In effect, the gate electrode of the transistor straddles or surrounds the fin. During operation, current flows between the source and drain terminals along the gated sidewall surfaces of the fin.
Bulk FinFET with dielectric isolation is attractive due to the ever increase of fin density and lower cost of bulk wafers. Bottom oxidation through shallow-trench isolation (BOTS) may be used to make bulk fin dielectric isolation. However, the bottom profile worsens with BOTS, and adversely impacts the monitoring of the fin height using conventional optical critical dimension measurements during the manufacturing of FinFET devices.